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Inside the race to make chips that sip power

Data centres now rival small countries in electricity use. A new generation of processors is trying to do more with far less.

Maya Okafor Technology & Design Editor
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In this article
  1. The end of free lunches
  2. Specialisation everywhere
  3. Moving data costs more than computing it
  4. The software side
  5. Limits and open questions

For most of computing history, the contest was about speed. Faster clocks, more transistors, bigger numbers on the box. Today the question that keeps chip architects awake is different: how many calculations can you do per watt?

The shift is driven by simple economics. In a large data centre, electricity and cooling are among the biggest costs, and in a phone they decide how long you can use the device.

The end of free lunches

For decades, shrinking transistors made chips faster and cooler at the same time. That bargain ended around the mid-2000s. Smaller transistors now leak more current and concentrate heat in tiny areas.

Designers responded by adding more cores rather than raising clock speeds, and then by specialising. A general-purpose core is flexible but wasteful. A circuit built for one job can be ten to a hundred times more efficient at it.

Specialisation everywhere

Modern processors are collections of specialists: video decoders, image signal processors, neural accelerators, cryptographic engines. The operating system's job is to hand each task to the cheapest unit able to do it.

The cheapest calculation is the one you never perform.

Moving data costs more than computing it

A surprising fact of modern hardware is that moving a number from memory to the processor can consume far more energy than adding two numbers together. That is why designers now obsess over caches, stacked memory and putting computation next to storage.

  • Keep frequently used data physically close to the compute units.
  • Use lower-precision numbers where accuracy allows.
  • Skip work entirely when inputs are zero or unchanged.

The software side

Hardware gains are wasted if software ignores them. Compilers and runtimes increasingly schedule work in bursts so the chip can sleep between them, and developers are learning to treat energy as a performance metric next to latency.

Limits and open questions

There is a floor imposed by physics on the energy needed to flip a bit. We are still several orders of magnitude away from it, which suggests plenty of headroom. The more immediate limit is human: designing and verifying such specialised chips is expensive, and only a handful of companies can afford it.

Efficiency is the new speed, and it rewards patience.

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